Consulting for Exam, Lab 3 returns, etc,
Mon Dec 12, 2:00-4:00, ME 4124
Final Exam, Fri. Dec.16, 2011, 2-5 PM, TB
446
Coming Soon in Student Area: Comments on
marking progress, high scores
Extra Info for Assg 3, Lab 3
You decide which phase detector you will use, either number 1
or 2, then use that one for your calculations.
In calculating R1, R2, R3, C you will have 3 equations and 4
unknowns. The equation for DC gain sets R3 to be twice R1, so
you could reduce this to 3 unknowns and two equationas, one for
omega_n and one for damping constant. What this means is that
you will have to pick one value. You can do this rather
arbitrarily then scale all the values later to get reasonable
sizes. As an example, you might pick a value for C then calculate
R2, R3. Typically R3 will be much larger than R2, so if your
arbitrary pick has resulted in R3 being too large, e.g, in the
M Ohms you can divide both R3 and R2 (and R1) by some value e.g.,
2, and multiply C by the same value of 2.
For Kphase, since you were testing at only 200 kHz, the measurement
should have been exactly like theory - any difference should
have been only due to measurement error e.g., in placing the
markers to read the time difference. If the two values are far
apart, you should go back and see what went wrong, or at least
come up with an explanation. For the filter design, you should
use the theoretical values.
Extra Info for Lab 2
Nagui tells me he will have parts available Friday morning in
room 4174. Parts include the mixer chip, potentiometer (for
carrier null), inductor (for output sideband filtering), and
various capacitors. Note, all parts need to be returned after
the lab is completed.
The Lab will be done in room ME 4135.
In the lab, there is an LRC meter to measure the inductor
L and Q. The highest frequency for this meter is 100 kHz, but
you can scale the results to your frequency by assuming that
L remains constant and the Q is proportional to the square root
of frequency. More information about inductors and Q can be
found in
this link describing Inductor Q at 100 kHz and 1.2 MHz.
From results, we suggest you use the 33 uH inductor to get the
highest parallel resistance. At the end is a plot showing how
the filter affects gain.
Note the document with extra info available on the student
area describing construction and trouble shooting.
Lab 2, Mixer: Other Important Points:
If possible, do construction ahead of time, to save about one
hour of lab time.
Bring your breadboard and wire strippers, in case modifications
are needed, and mini screwdriver for adjustment.
Extra Info for Assignment 2
The assignment is posted in the student area on the web page.
It is due in class Thursday Oct 20 at 1:05 PM.
It is a simulation exercise using ADS. Detailed information is
provided in an instruction file on the student area of the course
web page. Note the first steps, that of copying the appropriate
zap file and unarchiving it, are not given in these instructions,
but the steps are similar to what you did for assignment 1.
Extra Info for Assignment 1
The assignment is due in class, at 1:05 PM on Thursday Oct
6, 2011.
You may start with either your calculated or your simulated unmatched
input impedance. Just be sure the TA is aware of which one you
are using.
Extra Info for Lab 1
You are not expected to calculate the matched gain. In the marking
scheme after the simulated matched gain it asks for a comparison, but
this is a comparison to the unmatched gain, not to the calculated
gain.
If calculated matched gain were required (it isn't) there would
be three parts to it
(a) a factor of 1/2 because the input of the matching circuit
is now matched to the source resistance, thus vi/vs = 1/2
(b) vb/vi consists of a complex voltage divider between
the impedance of zin in parallel with the matching capacitor
and the impedance of the series matching inductor.
(c) vc/vb = -gm x R .
Course Objective
To learn about the design of
communications circuits. In other courses, the block diagram
approach has been used but in this course the emphasis will be
on the actual circuitry which makes up these blocks. Examples
of such blocks are tuned amplifiers, mixers, oscillators, phase
shifters and detectors. Communications systems considered are
AM, FM, television and telephony. Use of the PLL will be discussed.
Course Content
Introduction to Telecommunications:
Components of a radio systems; noise, distortion impedance matching.
Amplfier Design: Tuned amplifers, class C
amplifiers, extension to frequency multipliers.
Mixers and Modulators
Phase-Locked Loop and Applications:
Introduction to PLLs and applications such as:
synthesizers and FM demodulation.
Oscillators: (For 2011, done after Amplifiers, before
Mixers)
Amplitude Modulated Radio
Frequency Modulators and Demodulators
Television Systems:
Transmission and Reception of video and audio.
May also discuss high-definition TV, stereo sound.
Labs
Simulation Labs and Hardware Labs - Groups of 2, one writeup
per group, due one week after the scheduled lab day, 4:15 PM. (Note,
assignments are done individually)
Tuned Amplifiers: (Dates Tentative)
(Intro Week 1 Sept 12, 15, L1, A1, Week 3 Sept 26,29) Simulation
Lab. Design and simulation (in ADS) of a 7 MHz tuned amplifier,
built with a bipolar transistor and passive components. You
will learn about use of transistor parameters, tuned circuits,
noise figure, and impedance matching.
Mixers and Modulators: (Hardware Lab)
(Week 7, Oct 24, 27) Use of an analog multiplier on an IC to
build frequency changers. Observation of double-sideband suppressed
carrier, filtering to see single sideband output.
Phase-Locked Loops (Hardware Lab):
(Week 9 Nov 7,10, Week 11 Nov 21, 24) Use of a commercially available
package to build a tracking filter, a synthesizer and a an FM
demodulator. The IC contains a voltage-controlled oscillator
a phase detector, and amplifiers. In this lab, the VCO and phase
detector will be characterized, then a complete phased-lock loop
will be built. The main external components will consist of a
simple loop filter and a divider to realize the synthesizer.
Assignments:
Asg 1 is an extension of Lab 1, Asg 2 in Week 5 is an
oscillator simulation, Asg 3 is on PLLs.
Marks:
a) Three assignments worth 5% each
b) Three Labs worth 10, 10,15 (about 20% for demo)
c) One written exam worth 50%.
**** Students must get at least 35% in the final exam. ****
Text, Course Notes
There is no official course text,
but detailed course notes are available on a password protected
course web page. If you are registered for this course and do
not have access to it, please contact the course instructor.
The course notes should provide enough material, or some of the
references can be consulted.
References:
Smith,
"Modern Communication Circuits", Second Edition McGraw-Hill 1998, TK6553.S5595
Krauss, Bostonian, Raab,
"Solid State Radio Engineering", Wiley 1980, TK6553.K73
Rogers and Plett,
"Radio Frequency Integrated Circuit Design, Second Edition",
Artech House 2010
Hagen,
"Radio Frequency Circuit Design", Cambridge Press, 1997
William F. Egan,
"Frequency Synthesis by Phase Lock", 2nd Ed. John Wiley & Sons,
2000
Sedra, Smith,
(for intro to tuned amplifiers, oscillators)
Stremler,
"Introduction to Communication Systems", (or other intro texts)
Signetics or other Data Books,
Various Data Communications Circuits are accompanied with good data
sheets that give useful information about design.