Answer
Question Oct 5, 8:54AM Regarding assign1 :
referring to Figure 4, i'd like to clarify the instructions
lets call figure 3 input impedance, Zin1
in Figure 4, we want to match and input impedance (Zin2) of 50 Ohms, to Zin1 through the RLC Load added in?
Answer Since Zin1 or Zin2 are not labeled I will have to assume that you mean looking into the node labeled INPUT. In Fig 4, looking into the terminal labeled INPUT you should see 50 Ohms. Note that the 10 nF capacitor is considered big enough so that it behaves like an AC short circuit. C2 is equivalent to the capacitor we have previously called Cadd.
Question Oct 5, 8:50AM I have three questions:
1. the unshielded inductor, is that the primary or secondary? (i'm guessing the secondary)
2. to calculate gain, we have used Av=-gmRL, where RL is the resistance in the RLC tank. Would the resistance across the output (47ohms) come into any effect ?
3. for the double tuned amplifier, do we use the same number of turns (102) for the inductor? or do these change?
Answer 1. This should be the one with the most turns, so it will be the one closest to the transistor amplifier. On the input side, this could be seen as the secondary, while on the output, this would be the primary.
2. Of course you have to include all resistances, including the output resistance of the transistor and the (transformed) load resistance.
3. Use the same inductor. Just wondering why (for PLL's) you call the loop BW the modulating BW (i.e. on page 56 with the frequency response graph), what is the relationship ?
Question Oct 4
In the write-up we are asked to compute the voltage gain after designing the output matching network and then again to compute the voltage gain after designing the input matching network. The marking scheme only mentions calculating the voltage gain for the complete double tuned amp (I'm assuming this to mean the latter of the above mentioned gains). Do we need to calculate the former mentioned gain (just with the output tuned)?
For 1) in the write-up we are asked to compute the woltage gain of the amplifier at 10.7 MHz. Is this correct, or did you mean for us to compute it at 5.4 MHz (I checked in the 2001 notes and this is still the value)?
Answer You can't go wrong if you do both, calculate before and after designing the matching circuits. It turns out that the expression for overall gain of the double-tuned amplifier has three parts correspoding to the input stage, the amplifier itself and the output stage. So, you don't have to do any additional derivations, you just need to plug in the numbers.
As for the reference to 10.7 MHz, it seems I missed one in the lab write up as well. I had assumed students would recognize the marking scheme as being from last year, but had failed to correct all of them in the lab writeup.
I have now added to the statement on the web page as follows:
"The following is from 2000, but will be similar this year. Note: for Lab 1 and Assignment 1, frequency was 10.7 MHz last year, it is 5.4 MHz this year. Similarly, bandwidth has changed from 2 MHz last year to 1 MHz this year."