97.455 Telecommunication Circuits Lab 3 Phase-Locked Loops
 
This is a long, and somewhat complicated lab, running over two 
sessions. For the first lab period you should finish characterizing 
the VCO and Phase Detectors. If you are ahead after finishing 
this part, start the next part. Assignment 2 will cover some 
of the theoretical calculations required for the second part 
of the lab. Come into the second session with filter values calculated. 
Don't include unnecessary extra theory, and make sure the text 
is legible. 

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PART 1
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1) The VCO [10marks]
   [3] Chose resistor/capacitor values for the VCO. Adjust to 
       get the right frequency range.  
   [4] Plot of VCO frequency vs. DC tuning voltage.
   [3] Calculate KVCO.

2) The Three Phase Detectors: [20marks] 
   [6] Plot Vavg vs. phase difference.
   [6] Compare to theory. State theoretical value for slope.
   [4] Compute the Kphase for each phase detector.
   [4] Which phase detector is also a frequency detector? How do you
       know?
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PART 2
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3) The PLL Theory: [10marks] (also covered in Assignment 2)
   [3] Derive the transfer function of the filter.
   [3] Derive the phase error transfer function.
   [4] Size all the components in the filter.

4) The PLL measurements [30marks]
   [5] Look at input/output of PLL Do they have the same freq?
       Plot phase variation vs input freq.
   [5] Explain the wn connection.
   [5] Plot VCO control voltage vs. signal frequency. How does 
       it compare with the earlier measurements?
   [5] Reduce gain to 1. How did you do this?
   [5] Explain why lock range is what it is. Explain phase variation.
   [5] Plot phase variation.
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PART 3
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5) The PLL Synthesizer: [20marks]
   [5] Are the VCO and reference synchronized?
   [5] Vary the reference and watch the VCO. What happens?
   [5] Plot VCO control while the /N is switching. 
   [5] What would the transient look like if it didn't lose lock?
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6) Discretionary Marks [10marks]
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7) Demos: Part 1 Nov 1,2,3, Part 2,3 Nov 15,16,17 [50marks]
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Total 150 Marks