Publications (Last partial update May 2021).

Publications in Refereed Journals (33)

J. Pike, M. Parvizi, D. Berton, N. Ben-Hamida, S. Aouini, and C. Plett, "New Charge-Steering DFEs in 55-nm CMOS,"
in IEEE Trans. Circuits and Systems II: Express Briefs, Vol. 68, No. 1, pp. 231-235, Jan. 2021.

P.M.M. Silva, F.R. de Sousa, C. Plett, "On-chip Automatic LC Tuner for RFID Tags Based on Negative Resistance,"
in IEEE Trans. Circuits and Systems II: Express Briefs, Vol. 65, No. 8, pp. 1029-1033, Aug. 2018.

R. Smith, K. Ansari, J. Rogers, and C. Plett, "Tuning of the Relative Phases of a Rotary Travelling-Wave Oscillator,"
in IEEE Microwave and Wireless Components Letters, Vol. 26, No. 8, pp.610-612, Aug. 2016.

J. Lam, T. Riley, N.M. Filiol, J.W.M. Rogers, and C. Plett, "A 0.01 to 1.4 GHz Frequency Synthesizer with Suppressed Transients During VCO Band Switching,"
in IEEE Trans. Circuits and Systems II, Vol. 62, No. 12, pp. 1129-1133, Dec. 2015.

K.T. Ansari, T. Ross, P. Gamand, and C. Plett, "Frequency Domain Phase Shift Measurement Technique Applied to a Multiphase Rotary Travelling-Wave VCO,"
in IEEE Microwave and Wireless Components Letters, Vol. 25, No. 12, pp. 820-822, Dec. 2015.

S. Bashiri, S. Aouini, N. Ben-Hamida, and C. Plett, "Analysis and Modeling of Phase Detector Hysteresis in Bang-Bang PLLs,"
in IEEE Trans. Circuits and Systems I, Vol. 62, No. 2, pp. 347-355, Feb. 2015.

F.G.S. Silva, R.N. de Lima, R.C.S. Freire, and C. Plett, "A Switchless Multiband Impedance Matching Technique Based on Multiresonant Circuits,"
IEEE Trans. Circuits and Systems II, Vol. 60, No. 7, pp. 417-421, July 2013.

I. Haroun, C. Plett, Y.-C. Hsu, D.-C. Chang, "A Compact 60-GHz IPD-Based Branch-Line Coupler for System-On-Package V-band Radios,"
IEEE Journal of Components, Packaging and Manufacturing, Vol. 2, No. 7, pp. 1070-1074, July 2012.

S. Bashiri, S. Aouini, N. Ben-Hamida, C. Plett, "Spur Reduction in Bang-Bang PLLs Using a Programmable Bit-Stream",
IET Electronics Letters, Vol. 47 No. 19, pp. 1070-1072 15th Sept 2011.

I. Haroun, J.S. Wight, C. Plett, A. Fathy, D-C. Chang, "Experimental Analysis of a 60-GHz Compact EC-CPW Branch-line Coupler for mm-Wave CMOS Radios,"
IEEE Microwave and Wireless Components Letters Vol. 20, No. 4, pp. 211-213. April 2010.

P. H. R. Popplewell, V. Karam, A. Shamim, J. W. M. Rogers, L. Roy, and C. Plett, "A 5.2 GHz Transceiver using Injection-Locking and On-Chip Antenna,"
IEEE J. Solid-State Circuits, Vol. 43, No. 4, pp. 981-990, April 2008.

S. Hemati, A. Banihashemi, and C. Plett, "A 0.18-.m CMOS Analog Min-Sum Iterative Decoder for a (32,8) Low-Density Parity-Check (LDPC) Code"
IEEE J. Solid-State Circuits,, Vol. 41, No. 11, pp. 2531-2540, Nov. 2006.

J. Danson, C. Plett, and N. Tait, "A MEMS Capacitive Switch for use in Tunable RF Amplifiers,"
EURASIP J. Wireless Communications and Networking, Vol. 2006 Article ID 16518, pp. 1-9, May 2006.

J.W.M. Rogers, F.F. Dai, C. Plett, and M.S. Cavin, "A Phase Noise Analysis of SD Fractional-N Frequency Synthesizer,
EURASIP J.Wireless Communications and Networking, Vol. 2006 Article ID 48489, pp. 1-11, May 2006.

R.E. Amaya, P.H.R. Popplewell, M. Cloutier, and C. Plett, "EM and Substrate Coupling in Silicon RFICs,"
IEEE J. Solid-State Circuits, Vol. 40, No. 9, pp. 1968-1971, Sept. 2005.

F. Ma, J.P. Knight, and C. Plett, "Physical Resource Binding for a Coarse Grain Reconfigurable Array Using Evolutionary Algorithms,"
IEEE Trans. VLSI, Vol. 13, No. 5, pp. 553-563, May 2005.

R.E. Amaya, V. Levenets, N.G. Tarr, and C. Plett, "Copper coplanar waveguides in Si substrates for 10 GHz applications,"
J. Vac. Sci. Tech. A, Vol. 22, no. 3, pp. 847-850, May/June 2004.

J. Aguirre, and C. Plett, "50 GHz SiGe HBT Distributed Amplifiers Employing Constant-k and m-Derived Filter Sections,"
IEEE Trans. Microwave Theory Tech., Vol. 52, No. 5, pp. 1573-1579, May 2004.

N. Fong, J. Kim, J.-O. Plouchart, N. Zamdmer, D. Liu, L. Wagner, C. Plett and G. Tarr, "A Low-Voltage 40-GHz Complementary VCO with 15% Frequency Tuning Range in SOI CMOS Technology,"
IEEE J. Solid-State Circuits, , Vol 39, No. 5, pp. 841-846, May 2004.

B. Toole, and C. Plett, and M. Cloutier, "RF Circuit Implications of Moderate Inversion Enhanced Linear Region in MOSFETs,"
IEEE Trans. Circuits and Systems I, Vol. 51, No. 2, pp. 319-328, Feb. 2004.

R.E. Amaya, V. Levenets, N.G. Tarr, and C. Plett, "Copper Coplanar Waveguides in Si and Suitable for 10 GHz Applications,
Material Research Journal , 2004.

J. W. M. Rogers, and and C. Plett,"A 5GHz Radio Front-End with Automatically Q Tuned Notch Filter and VCO,"
IEEE J. Solid-State Circuits, vol. 38, No. 9, pp. 1547-1554 Sept. 2003.

N. Fong, J.-O. Plouchart, N. Zamdmer, D. Liu, L. Wagner, C. Plett and G. Tarr, "A 1-V 3.8 to 5.7-GHzWideband VCO with Differentially-Tuned Accumulation MOS Varactors for Common-Mode Noise Rejection in CMOS SOI Technology,"
IEEE Trans. Microwave Theory Tech. , vol.51, No. 8, pp. 1952-1959, Aug. 2003.

N. Fong, J.-O. Plouchart, N. Zamdmer, D. Liu, L. Wagner, Calvin Plett, Garry Tarr, "Design of Wideband VCO for Multi-Band Wireless LAN Applications,"
IEEE J. Solid-State Circuits, vol. 38, No. 8, pp. 1333-1342, August 2003.

J. W. M. Rogers, D. Rahn, and C. Plett, "A Study of Digital and Analog Automatic-Amplitude Control Circuitry for Voltage-Controlled Oscillators,"
IEEE J. Solid-State Circuits, vol. 38, No. 2, pp. 352-356, Feb. 2003.

J. Rogers, J. Macedo, and C. Plett, "A Completely Integrated 1.9 GHz Receiver Front-End with Monolithic Image Reject Filter and VCO,"
IEEE Trans. Microwave Theory Tech., vol. 50, No. 1, pp. 210-215, Jan. 2002.

J.W.M. Rogers, V. Levenets, C.A. Pawlowicz, N.G. Tarr, T.J. Smy, and C. Plett, "Post-Processed Cu Inductors with Application to a Completely Integrated 2-GHz VCO"
IEEE Trans. on Electron Devices vol. 48, No. 6, pp. 1284-1287, June 2001.

J.W.M. Rogers, J. Macedo, and C. Plett," The Effect of Varactor Non-Linearity on the Phase Noise of Completely Integrated VCOs"
IEEE J. Solid-State Circuits vol. 35, No. 9, pp. 1360-1367, Sept 2000.

N.M. Filiol, T.A.D. Riley, C. Plett, and M.A. Copeland, "An Agile ISM Band Frequency Synthesizer with Built-In GMSK Data Modulation,"
IEEE J. Solid-State Circuits, vol. 33, pp. 998-1008, July 1998.

N.M. Filiol, C. Plett, T.A. Riley, and M.A. Copeland, "An Interpolated Frequency-Hopping Spread-Spectrum Transceiver"
IEEE Trans. Circuits and Systems II, vol. 45, pp. 3-12, January 1998.

N.G. Tarr, C. Plett, A. Yeaton, G.F. Mackay, and I. Thomson, "Limitations on MOSFET Dosimeter Resolution Imposed by 1/f Noise,"
IEEE Trans. Nuclear Science, vol. 43, pp. 2492-2495, October 1996.

C. Plett, and M.A. Copeland, "Self-Tuned Continuous-Time Filters"
Kluwer, J. of VLSI Signal Processing, pp. 227-240, December 1994 .

C. Plett, and M.A. Copeland, "A Study of Tuning for Continuous-Time Filters Using Macromodels"
IEEE Trans. Circuits and Systems, vol. 39, pp. 524-531, August 1992.

Submitted to Refereed Journals (1)

Z. Jiang, H. Beshara, J. Lam, C. Plett, N. Ben-Hamida, "High speed DMT for 224 Gb/s and faster wireline transmission,"
accepted in Dec 2022 for publication in IEEE Trans. on Circuits and Systems.

Publications in Refereed Conference Proceedings (94)

Z. Jiang, H. Beshara, J. Lam, C. Plett, N. Ben-Hamida, "136-gb/s single channel wireline data transmission using discrete multi-tone with 8-b/s/Hz spectral efficiency,"
in 2021 OCP Global Summit, Nov 2021.

A. Eldahshan, W.C. Knisely, R.Amaya, C. Plett, "Miniaturized On-wafer Inductors using Slow-Wave Techniques,"
in Proc. IEEE Int. Midwest Symp. Circuits and Systems, Windsor ON. Canada, May 2018, pp. 913-916.

J. Pike, M. Parvizi, N. Ben-Hamida, S, Aiyubum, C. Plett, "New Charge-Steering Latches in 28nm CMOS for Use in High-Speed Wireline Transceivers,"
in Proc. IEEE Int. Symp. Circuits and Systems, Florence, Italy, May 2018, pp. 1-5.

K.T. Ansari, P. Gamand, and C. Plett, "Ku-band Integrated Building Blocks for Phased-Array Transmitter Design in SiGe:C BiCMOS,"
in Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), Boston, MA, Oct. 2015, pp. 9-12.

W.J.B. Machado and C. Plett, “Impact of ESD Protection and Power Supply Decoupling on 10 GHz Low Noise Amplifier”
proc. SBCCI, (27th Symposium on Integrated Circuits and Systems Design), Aracaju, Brazil, Sept 1-5, 2014, pp. 136-141.

W.J.B. Machado and C. Plett, “Electrostatic Discharge Protection for a 10 GHz Low Noise Amplifier”
proc. NEWCAS, Trois Rivieres, Quebec, Canada, June 22-25, 2014, pp. 273-276.

T. Wu, C. Plett, W.J.M. Rogers, and Ming Li, “A Fully Integrated 1 - 4 GHz GaN Class J Power Amplifier”
proc. WAMICON, Tampa, Florida, June 6, 2014, pp. 1-3.

K.T. Ansari, T.N. Ross, and C. Plett, "Ku-Band High Output Power Multiphase Rotary Travelling-Wave VCO in SiGe BiCMOS,"
proc. European Microwave 2013, pp. 97-100.

I. Haroun, and C. Plett, "Reduced-Size GaN Based 10 GHz 90 Degree Hybrid for X-Band Wireless Communications Systems,"
proc. 2013 IEEE Radio and Wireless Symp. Austin, Texas, Jan 20-23, 2013. pp 178-180.

I. Haroun, T.-Y. Lin, D.-C. Chang, and C. Plett, "A Compact 24-26 GHz IPD-Based 4x4 Butler Matrix for Beam Forming Antenna System,"
proc. 2012 Asia Pacific Microwave Conf, Taiwan, Dec 4-7, 2012, pp. 965-967.

I. Haroun, T.-Y. Lin, D.-C. Chang, and C. Plett, "A Reduced-Size Low-Loss 57-86 GHz IPD-Based Power Divider using Loaded Modified CPW Transmission Lines,"
proc. 2012 Asia Pacific Microwave Conf, Taiwan, Dec 4-7, 2012, pp. 1202-1204.

S. Shopov, R.E. Amaya, J.W.M. Rogers, C. Plett, "High-Performance Reduced Size 70-80 GHz Branch-Line Hybrid using CPW and CPWG Guided-Wave Structures,"
proc. IEEE IMS, Montreal, Quebec, Jun 17-22, 2012, pp. 1-3.

R. Beare, C. Plett, J.W.M. Rogers, "Highly Reconfigurable Single-Ended Low Noise Amplifier for Software Defined Radio Applications,"
proc. NEWCAS 2012, Montreal, June 16-20, 2012, pp. 549-552.

J. Lam, C. Plett, "Modified TSPC Clock Dividers for Higher Frequency Division by 3 and Lower Power Operation,"
proc. NEWCAS 2012, Montreal, June 16-20, 2012, pp. 437-440.

I. Haroun, and C. Plett, "Capacitively Center-Loaded Transmission Lines for Compact E-band 90 degree Couplers,"
digest APMC11, Melbourne Australia, December 2011, pp. 1738-1741.

I. Haroun, Y.-C. Hsu, D.-C. Chang, and C. Plett, "A Novel Reduced-Size 60-GHz 180 degree Coupler using LG-CPW Transmission Lines,"
digest APMC11, Melbourne Australia, December 2011, pp. 1750-1753.

I. Haroun, C. Plett, A. Momciu, R. E. Amaya, "60-GHz Receiver Front-End Hybrid System-On-Package for Low-Cost High Data Rate Radios,"
Proc. MWSCAS 2011, Aug. 7-10, 2011, Korea, pp. 1-4.

S. Shopov, R.E. Amaya, J.W.M. Rogers, C. Plett, "Adapting the Doherty Amplifier for Millimeter-Wave CMOS Applications,"
Proc. IEEE NEWCAS, Bordeaux, France, Jun 26-29, 2011, pp. 229-233. pp. 33-36.

S.B. Amid, C. Plett, P. Schvan, "Fully differential, 40 Gb/s regulated cascode transimpedance amplifier in 0.13 micron SiGe BiCMOS technology,"
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), Oct. 2010 pp. 33-36.

A. Liao, O. Salehi-Abari, C. Plett, "Comparative Study of Passive and Active Correlators for UWB Impulse Radio,
proc. NEWCAS,, Montreal, QC., Canada, June 21,22, 2010, pp. 13-16.

I. Haroun, C. Plett, J.S. Wight, A. Fathy, "Experimental Characterization of EC-CPW Transmission Lines and Passive Components for 60-GHz CMOS Radios,"
proc. IEEE Int. Microwave Symp., May 23-28, 2010, pp. 364-367.

J. Lam and C. Plett, "A Low Power DC-DC Converter for Scavenged-Power Wireless Sensor Networks,"
proc. Int. Symp. Circuits and Systems, Paris, France, May 30-June 2, 2010, pp. 4081-4084.

K. T Ansari and C. Plett, "A Low Power Ultra-Wideband CMOS LNA for 3.1-10.6-GHz Wireless Receivers,"
proc. Int. Symp. Circuits and Systems, Paris, France, May 30-June 2, 2010, pp. 209-212.

O. Salehi-Abari and C. Plett, "A Differential 5th Derivative Gaussian Pulse Generator for UWB Transceivers,"
proc. Int. Symp. Circuits and Systems, Paris, France, May 30-June 2, 2010, pp. 1089-1092.

S. A. Bashiri, C. Plett, J. Aguirre, P. Schvan, "A 40Gb/s Transimpedance Amplifier in 65 nm CMOS,"
proc. Int. Symp. Circuits and Systems, Paris, France, May 30-June 2, 2010, pp. 757-760.

I. Haroun, J.S. Wight, C. Plett, A. Fathy, Y.-C. Hsu, "A V-band 90-nm CMOS Low-Noise Amplifier with Modified CPW Transmission Lines for UWB Systems,"
proc. SiRF, (invited paper), New Orleans, Louisiana, January 2010, pp. 160-163.

I. Haroun, J.S. Wight, C. Plett, A. Fathy, Y.-C. Hsu, "A V-band 90-nm CMOS Low-Noise Amplifier with Modified CPW Transmission Lines for UWB Systems,"
proc. Radio and Wireless Symposium, New Orleans, Louisiana, January 2010, pp. 368-371.

I. Haroun, J.S. Wight, C. Plett, A. Fathy, "Multi-band 700MHz/ 2.4GHz/ 60GHz RF Front-End for Radio-over-Fiber Base Stations,"
proc. Radio and Wireless Symposium, New Orleans, Louisiana, January 2010, pp. 629-632.

I. Haroun,Y. Hsu, J.S. Wight, C. Plett, "A CMOS Low-Noise Amplifier with VPW Matching Elements for 60GHz-band Gbit/s Wireless Systems,"
proc. Asia Pacific Microwave Conf , Singapore, December 7-10, 2009, pp. 473-476.

K. T. Ansari, M. C. E. Yagoub, and C. Plett, "A Low-Power 0.4-22GHz, 8.6mW CMOS Cascode Distributed Amplifier for Optical Communication Systems,"
proc. Int. Conf. on Electronics, Circuits and Systems, Hamamet Tunisia, December 13-16, 2009, pp. 387-390.

K. T. Ansari, and C. Plett, " A CMOS Low Power Ultra-Wideband LNA Utilizing Feedback Technique,"
proc. MNRC, Ottawa, Ontario, Canada, October, 2009, pp. 5-8.

S. Amini and C. Plett, "Design and Analysis of Very Low Voltage Charge Pumps for RFID Tags,"
proc. Microsystems and Nanoelectronics Research Conference, Ottawa, Canada, Oct 15, 2008, pp. 9-12.

A. Shamim, V. Karam, P. Popplewell, L. Roy, J. Rogers, and C. Plett, "A CMOS Active Antenna/Inductor for System on a Chip (SoC) Applications,"
proc. 2008 IEEE AP-S International Symposium on Antennas and Propagation, San Diego, California, July 2008, pp. 1-4.

J. O. Plouchart, D. Kim, J. Kim, V. Karam, C. Plett, C. Cho, and R. Trzcinski, "A 1.2V 15.6mW 81GHz 2:1 static CML frequency divider with a band-pass load in a 90nm SOI CMOS technology,"
proc. proc. IEEE Compound Semiconductor IC Symp., Oct. 2007, pp. 1-4.

P. H. R. Popplewell, V. Karam, A. Shamim, J. W. M. Rogers, and C. Plett, "An Injection-Locked 5.2 GHz SoC Transceiver with On-Chip Antenna for Self-Powered RFID and Medical Sensor Applications,"
proc. VLSI Symp., Kyoto Japan, June 2007, pp. 88,89.

V. Karam, P. H. R. Popplewell, A. Shamim, J. W. M. Rogers, and C. Plett, "A 6.3 GHz BFSK Transmitter with On-Chip Antenna for Self-Powered Medical Sensor Applications,"
proc. RFIC Symp., Honolulu, Hawaii, June 2007, pp. 101-104.

P. H. R. Popplewell, V. Karam, A. Shamim, J. W. M. Rogers, and C. Plett, "A 5.2 GHz BFSK Receiver with On-Chip Antenna for Self-Powered RFID Tags and Medical Sensors,"
proc. RFIC Symp., Honolulu, Hawaii, June 2007, pp. 669-672.

J. Aguirre, C. Plett, and P. Schvan, "A 2.4Vp-p output, 0.045-32.5 GHz CMOS Distributed Amplifier,"
proc. RFIC Symp., Honolulu, Hawaii, June 2007, pp. 427-430.

V. Karam, N. Fong, and C. Plett, "Parasitic Aware Delay Optimization for Multi-GHz Static CMOS Ring Oscillators,"
proc. Northeast Workshop on Ciruits and Systems (NEWCAS), pp. 101-104, Gatineau Quebec, June 2006.

J. Chiu, and C. Plett, "High Frequency LC-VCO Design with Flicker Noise Reduction in 0.13 um CMOS,"
proc. Northeast Workshop on Ciruits and Systems (NEWCAS), pp. 57-60, Gatineau Quebec, June, 2006.

T. Lovitt, C. Plett, and J. Rogers, "A 0.13 um CMOS Delay Cell for 40 Gb/s FFE Equalization,"
proc. Int. Symp. Circuits and Systems, Kos Greece, pp. 5680-5683, May 2006.

P. H. R. Popplewell, V. Karam, A. Shamim, J.W.R. Rogers, M. Cloutier, and C. Plett, "5.2 GHz Self-Powered Lock and Roll Radio using VCO Injection Locking and On-Chip Antennas,"
proc. Int. Symp. Circuits and Systems, Kos Greece, pp. 5203-5206, May 2006.

A. Shamim, P. Popplewell, V. Karam, L. Roy, J. Rogers, and C. Plett, "Silicon Differential Antenna/Inductor for Short Range Wireless Communication Applications,"
proc. Canadian Conf. Electrical and Computer Engineering, Ottawa, Ontario. May 2006, pp. 94-97.

A. Shamim, P. H. R. Popplewell, V. Karam, L. Roy, C. Plett, and J.W.M. Rogers, "5.2 GHz On-Chip Antenna/Inductor for Short Range Wireless Communications Applications,"
proc. IEEE Int. Workshop on Antenna Tech., pp. 213-216, Mar. 2006.

S. Hemati, A.H. Banihashemi, and C. Plett, "An 80-Mb/s 0.18um CMOS Analog Min-Sum Iterative Decoder for a (32,8) LDPC Code,
proc. IEEE Custom Integrated Circuits Conf., San Jose, CA, Sept 2005, pp. 243-246.

J. Danson, C. Plett, and N. Tait, "Design and Characterization of a MEMS Capacitive Switch for Improved RF Amplifier Circuits,"
proc. IEEE Custom Integrated Circuits Conf.,, San Jose, CA, Sept 2005, pp. 251-254.

J. P. Abbott, C. Plett, and J.W.M. Rogers, "A 1.2V CMOS Multiplier for 10 Gbit/s Equalization,"
proc. IEEE Custom Integrated Circuits Conf.,, San Jose, CA, Sept 2005, pp. 645-648.

J. P. Abbott, C. Plett, and J.W.M. Rogers, "A 15GHz, 1.8V Variable-Gain, Modified Cherry Hooper Amplifier,"
European Solid-State Circuits Conf.,, Grenoble, France, Sept 2005, pp. 379-382.

J. Danson, C. Plett, and N. Tait, "A MEMS Capacitive Switch for RF Circuit Applications,"
Canadian Workshop on MEMs, Ottawa, ON Canada, Aug. 19, 2005 2 pages

S. Hemati, N. Ogbebor, A.H. Banihashemi, and C. Plett, "A High-Speed Analog Min-Sum Iterative Decoder,
ISIT 2005, Adelaide, Australia, Sept, 2005, pp. 1768-1772.

S. Hemati, A.H. Bahihashemi, C. Plett, and N. Ogbebor, "An Analog Min-Sum Decoder for a (32,8) LDPC Code,
proc. ninth Candian Workshop on Information Theory, CCWIT., Jun 5-8, 2005, pp. 203-206.

J. P. Abbott, C. Plett, and J.W.M. Rogers, "A Low Voltage CMOS Multiplier for High Frequency Equalization,"
proc. Int. Symp. Circuits and Systems, Kobe Japan, May 2005, pp. 1936-1939.

P. H. R. Popplewell, R. E. Amaya, C. Plett, and M. Cloutier, "Analysis and Measurement of Injection-Lockable Oscillator for High-Gain, High-Q Applications,"
proc. Analog VLSI Workshop, Macau, China, Oct. 2004, pp. 35-40.

R. E. Amaya, P. H. R. Popplewell, M. Cloutier, and C. Plett, "Analysis and Measurments of EM and Substrate Coupling Effects in Common RF Integrated Circuits,"
proc. IEEE Custom Integrated Circuits Conf., Orlando, Florida, Oct 2004, pp. 363-366.

P. H. R. Popplewell, R. E. Amaya, M. Cloutier, and C. Plett, "Calibration-Free On-Chip Inductor Coupling Experiment with Injection-Lockable VCOs,"
proc. Bipolar/BiCMOS Circuits and Technology Meeting, Montreal Canada, Sept 2004, pp. 261-264.

R.E. Amaya, V. Levenets, C. Plett, and N.G. Tarr, "Copper Coplanar Waveguides on Si Substrates for frequencies up to 40 GHz,"
proc. Int. Symp. on Antenna and Applied Electromagnetics , Ottawa, Ontario, Canada, July, 2004, pp. 51-54.

F. Ma, J. Knight, and C. Plett, "Physical Resource Binding for a Coarse Grain Reconfigurable Array",
proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms, Las Vegas, Nevada, June 21-24, 2004, pp. 109-115.

R.E. Amaya, N.G. Tarr, and C. Plett, "A 27 GHz Fully Integrated CMOS Distributed Amplifier using Coplanar Waveguides,"
Radio-Frequency Integrated Circuits SYmp. Dig., Fort Worth, Texas, USA, June 2004, pp. 193-196.

R.E. Amaya, J.E. Aguirre, and C. Plett, "Gain Bandwidth Considerations in Fully Integrated Distributed Amplfiers Implemented in Silicon,"
proc. Int. Symp. Circuits and Systems, Vancouver B.C. Canada, May 2004, vol. IV pp. 273-276.

P. Laferriere, D. Rahn, and C. Plett, J.W.M. Rogers, "A 5GHz Direct-Conversion Receiver with DC Offset Correction,"
proc. Int. Symp. Circuits and Systems, Vancouver B.C. Canada, May 2004, vol. IV, pp. 269-272.

P. Laferriere, D. Rahn, N. Fong, C. Plett, and J.W.M. Rogers, "DC Offset Correction Utilizing Differential Mode Feedback with APplications to a 5GHz Direct-Conversion Receiver,"
proc. Workshop on Wireless Circuits and Systems, Vancouver B.C. Canada, May 2004, pp. 47-48.

R.E. Amaya, V. Levenets, N.G. Tarr and C.Plett, "Copper Coplanar Waveguides in Si (silicon substrates) Suitable for (for operation above) 10 GHz Applications,"
(MRS) Advanced Metallization Conf. , Montreal, Canada, Oct. 2003. pp. 59-63. (2 pages?)

R. Amaya, and C. Plett, "Design of High Gain Fully-Integrated Distributed Amplifiers in 0.35 æm CMOS,"
proc. ESSCIRC, Estoril, Portugal, pp. 145-147, Sept 2003.

R.E. Amaya, V. Levenets, N.G. Tarr and C.Plett, "Copper Coplanar Waveguides on Si Substrates for 10 GHz Applications,"
11th Canadian Semiconductor Technology Conf., , Ottawa, Canada, Aug. 2003, Th1.2, 2 pages.

N. Fong, J.-O. Plouchart, N. Zamdmer, J. Kim, K. Jenkins, C. Plett and G. Tarr, "High-Performance and Area-Efficient Stacked Transformers for RF CMOS Integrated Circuits,"
proc. IEEE MTT-S Dig. , Philadelphia PA, pp. 967-970, June 2003.

J. Aguirre, and C. Plett, "A 0.1-50 GHz SiGe HBT Distributed Amplifier Employing Constant-k m-Derived Sections,"
proc. MTT-S Dig. , Philadelphia PA, pp. 923-926, June, 2003.

Neric Fong, Garry Tarr, Noah Zamdmer, Jean-Olivier Plouchart, Calvin Plett, "Accumulation MOS Varactors for 4 to 40 GHz VCOs in SOI CMOS"
proc. SOI Conf., Williamsburg, Virgina, pp. 158-160, Oct. 2002.

J. W.M. Rogers, and C. Plett, "A 5GHz Radio Front-End with Automatically Q Tuned Notch Filter,"
proc. Bipolar/BiCMOS Circuits and Technology Meeting, pp. 69-72, Monterey CA, Sept 29-Oct 1, 2002.

N. Fong, J.-O. Plouchart, N. Zamdmer, D. Liu, L. Wagner, C. Plett, and Garry Tarr, "Phase Noise Improvement of Deep Submicron Low-Voltage VCO"
proc. ESSCIRC, Florence, Italy, pp. 811-814, Sept 2002.

B. Toole, C. Plett, and M. Cloutier, "RF Circuit Implications of a Low-current Linearity "Sweet Spot" in MOSFETs"
proc. ESSCIRC, Florence, Italy, pp. 619-622, Sept 2002.

M. Moussavi, R. Mason, and C. Plett, "A Differential Bipolar Stray-Insensitive Quasi-Passive Pipelined Digital-to-Analog Converter with 17.664 MSps Conversion Rate and -85 dB THD,"
proc. ESSCIRC, Florence, Italy, pp. 699-702, Sept 2002.

N. Fong, J.-O. Plouchart, N. Zamdmer, D. Liu, L. Wagner, C. Plett, and G. Tarr, "A 40 GHz VCO with 9 to 15% Tuning Range in 0.13um SOI CMOS"
IEEE Symp. VLSI Circuits Dig. Tech. Papers, Honolulu, Hawaii, pp. 186-189, June 2002.

F. Ma, J.P. Knight, C Plett, "Reconfigurable Logic Design Case: FFT on Chameleon",
proc. Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications IV, pp. 113-124, Boston, June 20, 2002.

N. Fong, J.-O. Plouchart, N. Zamdmer, D. Liu, L. Wagner, C. Plett, and N.G. Tarr, "A 1V 3.8-5.7 GHz Differentially-Tuned VCO in SOI CMOS"
Radio-Frequency Integrated Circuits Symp. Dig., Seattle, Washington, pp. 75-78, June 2002.

N. Fong, J.-O. Plouchart, N. Zamdmer, D. Liu, L. Wagner, C. Plett, and G. Tarr, "A Low-Voltage Multi-GHz VCO with 58% Tuning Range in SOI CMOS"
proc. IEEE Custom Integrated Circuits Conf., Orlando Florida, May 2002, pp. 423-426.

J. Fortier, N.G. Tarr, A. Swaminathan, and C. Plett, "1.2 V 0.18um CMOS Imager with Column-Level Oversampling,"
pp. 132-135, proc. ESSCIRC 2001, Villach, Austria, Sept 2001.

W. Toole, and C. Plett, "A Low Voltage, Low Power RF CMOS LNA for Bluetooth Applications using Transmission Line Transformers,"
pp. 444-447, proc. ESSCIRC 2001, Villach, Austria, Sept 2001.

J.W.M. Rogers, D. Rahn, and C. Plett, "A 2.4GHz Wide Tuning Range VCO with Automatic Level Control Circuitry,"
pp. 356-359, proc. ESSCIRC 2001, Villach, Austria, Sept 2001.

J.W.M. Rogers, and C. Plett, "A Completely Integrated 1.8 Volt, 5GHz Tunable Image Reject Notch Filter,"
Radio-Frequency Integrated Circuits Symp. Dig., pp. 72-75, Phoenix, May 2001.

M. Moussavi, R. Mason, and C. Plett, "A Differential Bipolar Quasi-Passive Cyclic Digital-to-Analog Converter with 4.416 MSps Conversion Rate and -77 dB THD,"
proc. IEEE Custom Integrated Circuits Conf., pp. 161-164, San Diego, May 2001.

J. Rogers, V. Levenetts, C. A. Pawlowicz, N.G. Tarr, T. J. Smy, and C. Plett, "A Completely Integrated 2GHz VCO with Post-Processed Cu Inductors",
proc. IEEE Custom Integrated Circuits Conf., pp. 575-578, San Diego, May 2001.

J.W.M. Rogers, J. Macedo, and C. Plett, "A Completely Integrated 1.9 GHz Receiver Front-End with Monolithic Image Reject Filter and VCO"
Radio-Frequency Integrated Circuits Symp. Dig., pp. 143-146, Boston, Jun 2000.

N.M. Filiol, T.A.D. Riley, M.A. Copeland, and C. Plett, "A Receiver Path Delta-Sigma Frequency to Digital Converter"
Int. Symp. on Circuits and Systems, pp. III 331-334, Geneva, Switzerland, May 2000.

A. Swaminathan, N. Fong, P. Lauzon, H.K. Yang, M. Maliepaard, C. Plett, and W.M. Snelgrove, "A Low Power Sigma-Delta Analog-to-Digital Modulator with 50MHz Sampling Rate in a 0.25um SOI CMOS Technology"
Int. Conf. on SOI, pp. 14,15, Rohnert Park, California, 1999

J. Rogers, J. Macedo, J. Ojha, and C. Plett, "The Effect of Varactor Non-Linearity on the Phase Noise of a Completely Integrated 1.8GHz VCO",
BCTM, pp. 141-144, Minneapolis, Minnesota, Sept, 1999.

X. Wang, R. Mason, and C. Plett, "System Characterization in Delta-Sigma Converters,"
Wireless 99, pp. 126-136, Calgary, Alberta, Canada, July 1999.

S. Yang, R. Mason, and C. Plett, "6.5 mW CMOS Low Noise Amplifier at 1.9 GHz,"
IEEE Symp. on Circuits and Systems, pp.II-85-88, Orlando Florida, May 31 - June 2 1999.

S. Yang, C. Plett, and R. Mason, ""CMOS LNA in Wireless Applications,"
VTC'99, pp. 1920-1924, Houston, Texas, May 1999.

T.A. Riley, N.M. Filiol, M.A. Copeland, and C. Plett, "A Two-Loop Third-Order Delta-Si gma Frequency to Digital Converter,"
IEEE Symp. Circuits and Systems, Monterey Ca., May 1998.

N.M. Filiol, T.A. Riley, C. Plett, and M.A. Copeland, "A Lower ISM Band Frequency Synthesizer and GMSK Data Modulator,"
European Solid-State Circuits Conf., Southampton, UK, 1997.

N.M. Filiol, T.A. Riley, C. Plett, and M.A. Copeland, "Bit Error Measurements of An Interpolated Frequency Hopping Spread Spectrum Tranceiver"
IEEE Symp. Circuits and Systems, Seattle, pp. 97-100, vol. 1, Washington April 1995.

W.T. Bax, T.A. Riley, C. Plett, and M.A. Copeland, "A Sigma-Delta Frequency Discriminator Based Synthesizer"
IEEE Symp. Circuits and Systems, pp. 1-4 vol 1, Seattle, Washington, April 1995.

C. Plett, and M.A. Copeland, "Self-Tuned Continuous-Time Filters"
1990 Canadian Conf. on VLSI, Ottawa, Ontario, pp. 2.3.1-2.3.6, Oct. 1990.

C. Plett, M.A. Copeland and and R.A. Hadaway, "Continuous-Time Filters Using Open-Loop Tunable Transconductance Amplifiers,"
proc. IEEE/ISCAS, pp. 1173-1176, May 1986.

C. Plett and M.A. Copeland, "A Biquad Type CMOS Filter Using Transconductance Amplifiers,"
1985 Canadian Conf. on VLSI: Technical Digest, pp. 60-63, Toronto, Ontario, Nov. 1985.

Publications Submitted to Refereed Conferences and Workshops (0)

Books or Chapters in Books (7)

J.W.M. Rogers, C. Plett, and I. Marsland, Radio Frequency System Architecture and Design, Artech House, 2013.

J.W.M. Rogers and C. Plett, Radio Frequency Integrated Circuit Design, Second Edition, Artech House, 2010.

J. W. M. Rogers, F. F. Dai, and C. Plett, "Frequency Synthesis for Multiband Wireless Networks," chapter in Emerging Wireless Technologies: Circuits, Systems, and Devices, CRC Press, pp. 429-455, 2007.

C. Plett, "Distributed Effects and Coupling in RF Integrated Circuits," chapter in Emerging Wireless Technologies: Circuits, Systems, and Devices, CRC Press, pp. 545-567, 2007.

J.W.M. Rogers, C. Plett, and F.F. Dai, Integrated Circuit Design for High-Speed Frequency Synthesis Artech House, 2006.

J.W.M. Rogers and C. Plett, Radio Frequency Integrated Circuit Design, Artech House, 2003.

C. Plett, M.A. Copeland and R.A. Hadaway "Continuous-Time Filters using Open-Loop Tunable Transconductance Amplifiers," chapter in Integrated Continuous-Time Filters: Principles, Design and Applications, IEEE Press, edited by Y.P. Tsividis and J.O. Voorman, pp. 407- 410, 1993.

Patents

US Patent 6,681,103, John W.M. Rogers, Calvin Plett, "On-chip image reject filter," Issued January 20, 2004

US Patent 6,469,586 B1, John Rogers, Calvin Plett, "Low Voltage Voltage-Controlled Oscillator Topology", Issued Oct 22, 2002.

4,764,956 Active impedance line feed circuit

4,713,838 Amplifier with double rail output

4,691,271 Voltage multiplier and voltage multipliers in an amplifier with double rail output

4,571,460 Active impedance line feed circuit with improved ground fault protection

1209732 Candian Patent Aug. 1986, Active impedance line feed circuit with improved ground fault protection,

Patents Applied for(3), In Process (1)

Other Publications

J. Chiu, Z. Zhou, and C. Plett, "High-Frequency LC-VCO Design in 0.13 um CMOS,"
MR&DCAN (CMC Texpo), Ottawa, Ontario, Oct 13, 2005.

J. Abbott, C. Plett, and J. Rogers, "1.2V CMOS Multipliers for 10 Gbit/s Equalization,"
proc. Micronet Annual Workshop, Ottawa, Ontario, May 11, 2005, pp. 25,26. (Winner of best paper award.)

P. Laferierre, C. Plett, and J. Rogers, "DC Offset Correction in Direct Down Conversion Receivers"
proc. Micronet Annual Workshop, Ottawa, Ontario, May 2004.

R. Amaya, J. Aguirre, and Calvin Plett, "Design of Fully Integrated Distributed Amplifiers in Silicon Substrates,"
proc. Micronet Annual Workshop, pp. 7,8, Toronto, Ontario, Sept. 30, Oct. 1, 2002. (Winner of best paper award).

C. Plett, and R. Mason, "Analog Intellectual Property",
invited paper at Canadian Workshop on System on a Chip, Banff, AB, July 5, 2002.

J. Rogers, and Calvin Plett, "A 1.8V, 5GHz VCO with Transformer-Coupled Feedback,"
Internal Publication, June, 2002, 14 pages,

P. Popplewell, M. Sabourin, D. Sherif, V. Karam, (supervisor: C. Plett), "Bluetooth Transceiver in 0.35 um CMOS",
MR&DCAN,, Ottawa, Ont., June 2002.

N. Fong, C. Plett, and G. Tarr, "Low-Voltage Multi-GHz Oscillators in SOI CMOS"
proc. Micronet Annual Workshop, pp. 37,38, Aylmer Quebec, April 25,26, 2002

M.Moussavi, R. Mason, and C. Plett, "A Differential Bipolar Stray-Insensitive Quasi-Passive Pipelined Digital-to-Analog Converter with 17.664 MSps Conversion Rate and 85 dB THD"
Internal Publication, 2 pages Sept 2001.

J.W.M. Rogers, and C. Plett, "Low Power RF Front-End Components in SiGe for 5 GHz Applications: A Completely Integrated 1.8 Volt Tunable Image Reject Notch Filter,"
proc. Micronet Annual Workshop, pp. 43,44, Aylmer Quebec, April 20, 2001

W. Toole, and C. Plett, "Low Voltage, Low Power RF CMOS for Bluetooth Applications,"
proc. Micronet Annual Workshop, pp. 83,84, Aylmer Quebec, April 20, 2001

J.W.M. Rogers, V. Levenets, C. Pawlowicz, N.G. Tarr, T.J. Smy, and C. Plett, "Post-Processed Copper Inductors with Application to a Completely Integrated 2GHz VCO
Proceedings Micronet Annual Workshop, pp. 97,98, Aylmer Quebec, April 20, 2001

J. Fortier, A. Swaminathan, N.G. Tarr, and C. Plett, "1.2 Volt Wide Dynamic Range, CMOS Imager,"
proc. Micronet Annual Workshop, pp. 121,122, Aylmer Quebec, April 20, 2001

M. Moussavi, R. Mason, and C. Plett, "Algorithmic Digital-to-Analog Converters,"
proc. Micronet Annual Workshop, pp. 49,50, Aylmer Quebec, April 27,28, 2000

W. Toole, C. Plett, and T. Kwasniewski, "CMOS Technology Considerations for Next Generation GHz Range Transceiver,"
Internal Publication , 1999.

J. Rogers, N. Fong, N.G. Tarr, and C. Plett, "A Completely Inductorless 1.6GHz GM-C Based Tunable Notch Filter"
Internal Publication , 1999.

T. Chung, and C. Plett, " Low Power Si Differential Low Noise Amplifier",
Internal Publication, 1999
Y. Wang, and C. Plett, "CMOS IF Filter Design,"
Cito Researcher Retreat, Ottawa, Ont., May, 1999.

B. Toole, C. Plett, and T. Kwasniewski, "Considerations for Sub-1V RF Design in CMOS,"
Micronet Workshop, Ottawa, Ont., May, 1999, and
Cito Researcher Retreat, Ottawa, Ont., May, 1999.

John Rogers, T. J. Smy, and C. Plett, "Oscillator Design Using Copper Inductors,"
Micronet Workshop, Ottawa, Ont., May, 1999.

S. Kubba, R. Amaya, R. Fernando, K. Mehandru, and C. Plett, "Design Exploration for CMOS Radio Circuits,"
Canadian Workshop on RF IC Research and Development, Ottawa, Ont., Nov. 16, 1998.

J. Rogers, C. Plett, and T.J. Smy, "A Completely Integrated 1.8 GHz VCO," (Winner of SMC Industrial Collaboration Award)
MR&DCAN,, Ottawa, Ont., June 1998.

T.J. Chung, C. Plett, and W.M. Snelgrove, "A Low Power 5.2 GHz Differential LNA,"
CITO Researchers Retreat,, Hamilton, Ont., May 1998.