Phase-Locked Loop and Receiver Synchronizers

Taught from 1996 to 2004 by J.S. Wight

Course Outline

Last updated: February 25, 1997

Course Content

  1. Loop Components: phase detectors, voltage-controlled oscillators, filters.

  2. Loop Operation: First-order and second-order.

  3. Loop stability: for first-order and second-order loops.

  4. Transient Response: phase step, frequency step, linear frequency variation.

  5. Modulations: Sinusoidal phase modulation, sinusoidal frequency modulation, use of a PLL as a discriminator.

  6. Acquisition: Natural acquisition for first-order and second-order loops, phase plane method.

  7. Noise: Additive noise response, signal-to-noise ratio of a PLL phase demodulator and of a PLL frequency demodulator.

  8. Receiver Synchronizers: Carrier Synchronizers: Squaring loop, Costas loop, Remodulator, BPSK and QPSK bit error performance.

  9. Clock synchronizers: Early-late gate synchronizer, Inphase/midphase synchronizer, Delay line Multiplier, Narrow Band Synchronizers.

  10. Code Synchronizers: single-dwell and multiple-dwell serial PN acquisition, matched-filter PN acquisition, delay-locked loop and Tau-Dither loop PN tracking.

Marks:

a) Three assignments worth 20% each
b) One written exam (3 hours open book) worth 40%.

Text:

Alain Blanchard, "Phase-Locked Loops: Applications to Coherent Receiver Design", Wiley 1976. Reprinted 1992, Krieger.

References:

Stensby, "PLL something?", recent
Razavi, "PLL collection of papers?", recent
Gardner, "Phaselock Techniques", 2nd Edition, Wiley 1979.
Wolaver, Phase-Locked Loop Circuit Design, Prentice Hall, 1991.
Best, "Phase-Locked Loops,", McGraw-Hill, fourth edition 1999.
Simon, Omura, Scholtz, Levitt,, "Spread Spectrum Communications" Vol. III, Computer Science Press, 1985.