Fourth Year Projects for 2017-2018

High Speed Broadband Data Communication System

Projects involve mixed-signal, analog, and RF integrated circuit design, and will be done in collaboration with a local company. This project has the potential to lead to employment opportunities with the company.

the overall goal of the project is to design components of a high speed broadband data communication system, with each student being responsible for one component, aspect, or subsystem
This project is a follow-up to a successful pilot project last year of a few students working with our industrial partners. As last year, arrangments have been made for particpants to interact with personnel from Ciena roughly on a weekly basis to keep the projects on track and relevant.
design would be done using the same tools as used in industry to do integrated circuit design and layout, that is, Cadence and a recent design kit, for example, a 28 nm FDSOI (fully depleted Silicon on Insulator CMOS), or a 55 nm BiCMOS process,

Potential individual components, aspects, or subsystems might include:

Verilog modeling of analog circuits;
time-mode signal processing and serdes,
new techniques for injection-locked VCOs,
a novel phase-noise and jitter measurement scheme,
on-chip DC-DC converters
on-chip regulators,
on-chip instrumentation DACs