Fourth Year Projects for 2016-2017

Group Project in Wireless Power Transfer

This project will build on the work done in 2015-2016, during which a group of students worked on wireless power transfer in the ISM Band at about 900 MHz. At frequencies such as 900 MHz, parts need to be built on a printed circuit board, however, some prototypes were built at lower frequencies on a breadboard to test the principles. On the transmit side, parts included multiple antennas to form a phased array to allow some beam steering, a phase shifting circuit to enable beam steering, and a power oscillator to drive the antennas. On the receive side was a receiving antenna, a receive signal strength indicator, a feedback system, a rectifier, a charge pump, a switch-mode voltage boosting circuit and a voltage regulator.

For 2016-2017, the project will be similar but at a higher frequency in order to reduce the size of some of the components, such as the antennas and delay lines. If a popular frequency such as 2.4 GHz is chosen, inexpensive parts should still be widely available.

Here is good overview of RF Energy Harvesting (Accessible on Campus Only)

Group Project in Custom Latch Design for Lower Power Flip Flops in CMOS

Note: This project is available by prior arrangement only since it requires some specialized background. All others will be directed to the above project on Wireless Power Transfer.

This project is appropriate for 2 or possibly 3 students with prior Cadence experience, and will make use of a 28nm Fully Depleted CMOS SOI process. In order to save power, students would consider the impact of designing the scan input for different speeds, modifying the duty cycle for different parts of the flip flop, and considering the feasibility and possible advantages of some form of dynamic logic. Performance parameters such as power dissipation and setup and hold times would be compared to existing designs for a range of process, voltage, and temperature conditions as well as variations of the duty cycle and rise and fall times of the input clock. The resulting components with an improved balance between performance and power dissipation would have a wide range of applications from the back end of communications systems to logic associated with biomedical sensors.